Deepak Goyal, Intel Corporation (US)
„Advanced 2D & 3D Packaging Architectures ”
Heterogeneous Integration (HI) of disparate computing and communications functions is a key enabler of performance in micro-electronic systems. HI is crucially enabled by advanced packaging since packages are an optimal HI platform. This talk will address the role of advanced packaging in enabling HI and will focus primarily on the technology evolution of package interconnect densities. It will show how 2D and 3D packaging has evolved to provide increased interconnect density and key high end technologies such as EMIB, the silicon interposer and 3D stacking will be discussed in this context. This talk will also discuss challenges and opportunities in key areas such as interconnect scaling, power management, high speed IO, thermal management, test and FI/FA.
Deepak Goyal graduated with a PhD from State University of New York, Stony Brook, and joined Intel as a Failure Analysis Engineer. He is currently the Director of the Assembly and Test Technology Development Failure Analysis Labs at Intel. His responsibilities include development of the next generation of analytical tools and techniques, defect characterization, fault isolation, failure and materials analyses for the next generation package technology development at Intel, analytical chemistry labs in support of the substrate development and manufacturing, and Board and System level failure analysis. He has won two Intel Achievement Awards and has several patents.